module tb_ALU_32bit; // Inputs reg [31:0] a_in; reg [31:0] b_in; reg [3:0] op; // Outputs wire [31:0] result; wire zero; wire overflow; // Instantiate the Unit Under Tset (UUT) ALU_32bit uut( .a_in(a_in), .b_in(b_in), .op(op), .result(result), .zero(zero), .overflow(overflow) ); initial begin // Initialize Inputs a_in =0; b_in =0; op = 0; // Wait 100ns for flobal reset #100; // a b AND , 연산 a[n]..